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branch-misses
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
bus-cycles
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
tx-commit
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
instructions
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
cycles-t
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
cycles-ct
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
branch-instructions
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
mem-stores
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
cache-misses
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
ref-cycles
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
el-start
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
mem-loads
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
el-abort
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
cache-references
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
el-conflict
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
el-capacity
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
tx-conflict
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
tx-capacity
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
tx-start
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
tx-abort
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
el-commit
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11
cpu-cycles
Created: 2025-01-15 21:10:11
Modified: 2025-01-15 21:10:11

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