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branch-misses
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
bus-cycles
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
tx-commit
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
instructions
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
cycles-t
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
cycles-ct
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
branch-instructions
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
mem-stores
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
cache-misses
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
ref-cycles
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
el-start
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
mem-loads
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
el-abort
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
cache-references
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
el-conflict
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
el-capacity
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
tx-conflict
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
tx-capacity
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
tx-start
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
tx-abort
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
el-commit
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18
cpu-cycles
Created: 2025-08-26 03:07:18
Modified: 2025-08-26 03:07:18

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