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branch-misses
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
bus-cycles
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
tx-commit
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
instructions
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
cycles-t
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
cycles-ct
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
branch-instructions
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
mem-stores
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
cache-misses
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
ref-cycles
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
el-start
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
mem-loads
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
el-abort
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
cache-references
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
el-conflict
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
el-capacity
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
tx-conflict
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
tx-capacity
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
tx-start
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
tx-abort
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
el-commit
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54
cpu-cycles
Created: 2025-09-13 03:20:54
Modified: 2025-09-13 03:20:54

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